Only make registers appear on verbosity level 5 (#198)

* make --verbose output more useful

* refactor and rename rendering functions

* refactor to use join

* make sure str returns a value
This commit is contained in:
JP Smith
2017-04-28 12:17:17 -05:00
committed by GitHub
parent 8d6bcadb37
commit f7598e53c0
3 changed files with 31 additions and 25 deletions
+1 -1
View File
@@ -107,7 +107,7 @@ def main():
m.load_assertions(args.assertions)
if args.verbose:
m.verbosity = 5
m.verbosity = 4
else:
m.verbosity = 1
+28 -22
View File
@@ -11,6 +11,7 @@ from functools import wraps
import types
import logging
logger = logging.getLogger("CPU")
register_logger = logging.getLogger("REGISTERS")
@@ -436,10 +437,10 @@ class Cpu(object):
implementation = getattr(self, name, fallback_to_emulate)
#log
if logger.level == logging.DEBUG :
for l in str(self).split('\n'):
logger.debug(l)
logger.debug(self.render_instruction())
for l in self.render_registers():
register_logger.debug(l)
implementation(*instruction.operands)
self._icount+=1
@@ -462,6 +463,28 @@ class Cpu(object):
# line present.
del emu
def render_instruction(self):
try:
instruction = self.instruction
return "INSTRUCTION: 0x%016x:\t%s\t%s"%( instruction.address, instruction.mnemonic, instruction.op_str)
except:
return "{can't decode instruction }"
def render_register(self, reg_name):
result = ""
value = self.read_register(reg_name)
if issymbolic(value):
aux = "%3s: "%reg_name +"%16s"%value
result += aux
elif isinstance(value, (int, long)):
result += "%3s: 0x%016x"%(reg_name, value)
else:
result += "%3s: %r"%(reg_name, value)
return result
def render_registers(self):
return map(self.render_register, self._regfile.canonical_registers)
#Generic string representation
def __str__(self):
'''
@@ -470,25 +493,8 @@ class Cpu(object):
:rtype: str
:return: name and current value for all the registers.
'''
result = ""
try:
instruction = self.instruction
result += "INSTRUCTION: 0x%016x:\t%s\t%s\n"%( instruction.address, instruction.mnemonic, instruction.op_str)
except:
result += "{can't decode instruction }\n"
regs = self._regfile.canonical_registers
for reg_name in regs:
value = self.read_register(reg_name)
if issymbolic(value):
aux = "%3s: "%reg_name +"%16s"%value
result += aux
elif isinstance(value, (int, long)):
result += "%3s: 0x%016x"%(reg_name, value)
else:
result += "%3s: %r"%(reg_name, value)
result += '\n'
result = self.render_instruction() + "\n"
result += '\n'.join(self.render_registers())
return result
+2 -2
View File
@@ -202,7 +202,7 @@ class Manticore(object):
logging.basicConfig(format='%(asctime)s: [%(process)d]%(stateid)s %(name)s:%(levelname)s: %(message)s', stream=sys.stdout)
for loggername in ['VISITOR', 'EXECUTOR', 'CPU', 'SMT', 'MEMORY', 'MAIN', 'MODEL']:
for loggername in ['VISITOR', 'EXECUTOR', 'CPU', 'REGISTERS', 'SMT', 'MEMORY', 'MAIN', 'MODEL']:
logging.getLogger(loggername).addFilter(ctxfilter)
logging.getLogger(loggername).setState = types.MethodType(loggerSetState, logging.getLogger(loggername))
@@ -275,7 +275,7 @@ class Manticore(object):
[('MAIN', logging.INFO), ('EXECUTOR', logging.DEBUG), ('MODEL', logging.DEBUG)],
[('MAIN', logging.INFO), ('EXECUTOR', logging.DEBUG), ('MODEL', logging.DEBUG), ('MEMORY', logging.DEBUG), ('CPU', logging.DEBUG)],
[('MAIN', logging.INFO), ('EXECUTOR', logging.DEBUG), ('MODEL', logging.DEBUG), ('MEMORY', logging.DEBUG), ('CPU', logging.DEBUG)],
[('MAIN', logging.INFO), ('EXECUTOR', logging.DEBUG), ('MODEL', logging.DEBUG), ('MEMORY', logging.DEBUG), ('CPU', logging.DEBUG), ('SMTLIB', logging.DEBUG)]]
[('MAIN', logging.INFO), ('EXECUTOR', logging.DEBUG), ('MODEL', logging.DEBUG), ('MEMORY', logging.DEBUG), ('CPU', logging.DEBUG), ('SMT', logging.DEBUG), ('REGISTERS', logging.DEBUG)]]
# Takes a value and ensures it's in a certain range
def clamp(val, minimum, maximum):
return sorted((minimum, val, maximum))[1]