DeforaNetworks/manticore
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feliam 2017-03-02 16:37:25 -03:00
parent f5515df4ff
commit 61ccfc1b14
1 changed files with 0 additions and 2 deletions
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manticore/core/cpu/arm.py
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@ -440,8 +440,6 @@ class Armv7Cpu(Cpu):
return 'LSR'
elif instr.mnemonic.startswith('lsl'):
return 'LSL'
elif instr.mnemonic.startswith('asr'):
return 'ASR'
return OP_NAME_MAP.get(name, name)
def readOperand(self, op):