Add capstone ASR special case

2017-03-02 16:33:58 -03:00 · 2017-03-02 16:33:58 -03:00 · f5515df4ff
commit f5515df4ff
parent 04d95735ac
1 changed files with 2 additions and 0 deletions
--- a/manticore/core/cpu/arm.py
+++ b/manticore/core/cpu/arm.py
@ -440,6 +440,8 @@ class Armv7Cpu(Cpu):
                return 'LSR'
            elif instr.mnemonic.startswith('lsl'):
                return 'LSL'
+            elif instr.mnemonic.startswith('asr'):
+                return 'ASR'
        return OP_NAME_MAP.get(name, name)

    def readOperand(self, op):