From fe2538f6bc7aa82656771aa586fb258d2680c592 Mon Sep 17 00:00:00 2001 From: Disconnect3d Date: Tue, 6 Mar 2018 06:42:48 +0700 Subject: [PATCH] Add docstring for ARM's operand.is_shifted (#788) So that people don't have to google that by themselves! lolo --- manticore/core/cpu/arm.py | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/manticore/core/cpu/arm.py b/manticore/core/cpu/arm.py index cea1030..dd26c74 100644 --- a/manticore/core/cpu/arm.py +++ b/manticore/core/cpu/arm.py @@ -129,6 +129,18 @@ class Armv7Operand(Operand): raise NotImplementedError("writeback Operand unknown type", self.op.type) def is_shifted(self): + """ + In ARM some of the operands may have an additional metadata which means they can be shifted + with either a register or immediate value. + + See: + * https://github.com/aquynh/capstone/blob/fdebc371ba0568acde007e08dad2cc3c9333e3fa/include/arm.h#L22-L34 + + * 11.5 Syntax of Operand2 as a register with optional shift + http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0473m/dom1361289852638.html + + :return: True if operand is shifted, otherwise False. + """ return self.op.shift.type != cs.arm.ARM_SFT_INVALID def address(self):