Pub-sub like events (#371)

* WIP New Policy class

* WIP pubsub

* Update Signal tests

* small fixes from github comments

* Fix event decode_instruction signature

* Good merge

* Good good merge

* Eventful class commented

* The million typos

* Code revision

* Fix tests for new mor strict Eventful
This commit is contained in:
feliam
2017-07-27 19:41:08 -03:00
committed by GitHub
parent a3cf6e7d2c
commit 76357216da
14 changed files with 312 additions and 390 deletions
+1
View File
@@ -61,6 +61,7 @@ class IntegrationTest(unittest.TestCase):
'--procs', '4',
filename,
'+++++++++'], stdout=output)
self.assertTrue(time.time()-t < 20)
def test_cli_verbosity(self):
+77
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@@ -0,0 +1,77 @@
import unittest
from manticore.utils.event import Eventful
class A(Eventful):
def do_stuff(self):
self.publish("eventA",1, 'a')
class B(Eventful):
def __init__(self, child, **kwargs):
super(B, self).__init__(**kwargs)
self.child = child
self.forward_events_from(child)
def do_stuff(self):
self.publish("eventB", 2, 'b')
class C():
def __init__(self):
self.received = []
def callback(self, *args):
self.received.append(args)
class ManticoreDriver(unittest.TestCase):
_multiprocess_can_split_ = True
def setUp(self):
self.state = {}
def tearDown(self):
pass
def test_weak_references(self):
a = A()
self.assertSequenceEqual( map(len, (a._signals, a._forwards)), (0, 0) )
b = B(a)
self.assertSequenceEqual( map(len, (a._signals, a._forwards)), (0, 1) )
self.assertSequenceEqual( map(len, (b._signals, b._forwards)), (0, 0) )
c = C()
b.subscribe('eventA', c.callback)
self.assertSequenceEqual( map(len, (a._signals, a._forwards)), (0, 1) )
self.assertSequenceEqual( map(len, (b._signals, b._forwards)), (1, 0) )
b.subscribe('eventB', c.callback)
self.assertSequenceEqual( map(len, (a._signals, a._forwards)), (0, 1) )
self.assertSequenceEqual( map(len, (b._signals, b._forwards)), (2, 0) )
del c
self.assertSequenceEqual( map(len, (a._signals, a._forwards)), (0, 1) )
self.assertSequenceEqual( map(len, (b._signals, b._forwards)), (0, 0) )
del b
self.assertSequenceEqual( map(len, (a._signals, a._forwards)), (0, 0) )
def test_basic(self):
a = A()
b = B(a)
c = C()
b.subscribe('eventA', c.callback)
b.subscribe('eventB', c.callback)
a.do_stuff()
self.assertSequenceEqual(c.received, [(1, 'a')])
b.do_stuff()
self.assertSequenceEqual(c.received, [(1, 'a'), (2, 'b')])
-70
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@@ -1,70 +0,0 @@
import unittest
from manticore.utils.event import Signal
class Sender(object):
def __init__(self):
self.sig = Signal()
self.sig2 = Signal()
class ManticoreDriver(unittest.TestCase):
_multiprocess_can_split_ = True
def setUp(self):
self.state = {}
def tearDown(self):
pass
def setReceived(self, key, val):
self.state[key] = val
def setReceived2(self, key, val):
self.state[key] = val
def test_basic(self):
s = Sender()
def recv():
self.state['received'] = True
self.state['received'] = False
s.sig += recv
s.sig()
self.assertEqual(self.state['received'], True)
def test_method(self):
s = Sender()
s.sig += self.setReceived
s.sig('received', True)
self.assertEqual(self.state['received'], True)
def test_disconnect(self):
s = Sender()
s.sig.connect(self.setReceived)
s.sig -= self.setReceived
s.sig('received', True)
self.assertNotIn('received', self.state)
def test_predicate(self):
s = Sender()
s.sig.connect(self.setReceived)
s.sig2.connect(self.setReceived2, lambda: False)
s.sig('true', True)
s.sig2('false', True)
self.assertEqual(self.state['true'], True)
self.assertNotIn('false', self.state)
+3 -14
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@@ -1,7 +1,6 @@
import unittest
from manticore.utils.event import Eventful
from manticore.platforms import linux
from manticore.utils.event import Signal
from manticore.core.state import State
from manticore.core.smtlib import BitVecVariable, ConstraintSet
@@ -19,25 +18,15 @@ class FakeMemory(object):
class FakeCpu(object):
def __init__(self):
self.will_decode_instruction = Signal()
self.will_execute_instruction = Signal()
self.did_execute_instruction = Signal()
self.will_emulate_instruction = Signal()
self.did_emulate_instruction = Signal()
self.will_read_register = Signal()
self.will_write_register = Signal()
self.will_read_memory = Signal()
self.will_write_memory = Signal()
self._memory = FakeMemory()
@property
def memory(self):
return self._memory
class FakePlatform(object):
class FakePlatform(Eventful):
def __init__(self):
super(FakePlatform, self).__init__()
self._constraints = None
self.procs = [FakeCpu()]
+3 -12
View File
@@ -4,10 +4,10 @@ import unittest
from multiprocessing.managers import SyncManager
from manticore.platforms import linux
from manticore.utils.event import Signal
from manticore.core.state import State
from manticore.core.smtlib import BitVecVariable, ConstraintSet
from manticore.core.workspace import *
from manticore.utils.event import Eventful
manager = SyncManager()
manager.start(lambda: signal.signal(signal.SIGINT, signal.SIG_IGN))
@@ -24,18 +24,9 @@ class FakeMemory(object):
def constraints(self, constraints):
self._constraints = constraints
class FakeCpu(object):
class FakeCpu(Eventful):
def __init__(self):
self.will_decode_instruction = Signal()
self.will_execute_instruction = Signal()
self.did_execute_instruction = Signal()
self.will_emulate_instruction = Signal()
self.did_emulate_instruction = Signal()
self.will_read_register = Signal()
self.will_write_register = Signal()
self.will_read_memory = Signal()
self.will_write_memory = Signal()
super(FakeCpu, self).__init__()
self._memory = FakeMemory()