From 1f838736a57bfd2eb64d07bcfc8b87967a6d8194 Mon Sep 17 00:00:00 2001
From: feliam <felipe.andres.manzano@gmail.com>
Date: Mon, 6 Mar 2017 15:31:24 -0300
Subject: [PATCH] Add capstone ASR special case (#42)

* Add capstone ASR special case

* Fix capstone install (#43)

* Add arm asr, abstract SR type insns (#44)

* tmp

* Fix bug

* test m.hook typerror (#41)

* Use setuptool extras for dev deps (#40)

* Add extra deps to setup.py

* Fix nose dep

* lol wrong keystone

* Fix readme

* Update travis

* Workaround capstone install bug

* Use --no-binary in only pip install line

* Fix another readme regression

* Not again

* Update README.md

* Update README.md

* Update README.md

* Update README.md

* Update travis token, reformat (#46)

the travis cli tool auto reformatted the yaml

* Remove embedded ply (#47)

* rm ply

* add ply dep

* Refactor `new_symbolic_value` (#48)

* Use default params instead of dict, add taint

* Update docstring

* Add capstone ASR special case
---
 manticore/core/cpu/arm.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/manticore/core/cpu/arm.py b/manticore/core/cpu/arm.py
index 078c006..279b91a 100644
--- a/manticore/core/cpu/arm.py
+++ b/manticore/core/cpu/arm.py
@@ -440,6 +440,8 @@ class Armv7Cpu(Cpu):
                 return 'LSR'
             elif instr.mnemonic.startswith('lsl'):
                 return 'LSL'
+            elif instr.mnemonic.startswith('asr'):
+                return 'ASR'
         return OP_NAME_MAP.get(name, name)
 
     def readOperand(self, op):