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hashcat/OpenCL
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Jens Steube 141b59b80e Merge pull request #2883 from hashcat/HIP 
Merge HIP branch into master
2021-07-16 19:54:00 +02:00
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amp_a0.cl
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amp_a1.cl
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amp_a3.cl
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inc_cipher_aes-gcm.cl
add min/max data length limits to MetaMask Wallet
2021-07-04 20:14:25 +02:00
inc_cipher_aes-gcm.h
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inc_cipher_aes.cl
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inc_cipher_aes.h
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inc_cipher_camellia.cl
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inc_cipher_camellia.h
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inc_cipher_des.cl
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inc_cipher_des.h
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inc_cipher_kuznyechik.cl
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inc_cipher_kuznyechik.h
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inc_cipher_rc4.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
inc_cipher_rc4.h
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
inc_cipher_serpent.cl
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inc_cipher_serpent.h
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inc_cipher_twofish.cl
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inc_cipher_twofish.h
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inc_common.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
inc_common.h
Add missing backports from code base v6.2.2
2021-07-11 12:38:59 +02:00
inc_comp_multi_bs.cl
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inc_comp_multi_bs.h
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inc_comp_multi.cl
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inc_comp_multi.h
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inc_comp_single_bs.cl
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inc_comp_single_bs.h
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inc_comp_single.cl
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inc_comp_single.h
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inc_diskcryptor_xts.cl
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inc_diskcryptor_xts.h
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inc_ecc_secp256k1.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
inc_ecc_secp256k1.h
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inc_hash_blake2b.cl
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inc_hash_blake2b.h
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inc_hash_md4.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_md4.h
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inc_hash_md5.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_md5.h
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inc_hash_ripemd160.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_ripemd160.h
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inc_hash_sha1.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_sha1.h
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inc_hash_sha224.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_sha224.h
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inc_hash_sha256.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_sha256.h
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inc_hash_sha384.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_sha384.h
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inc_hash_sha512.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_sha512.h
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inc_hash_streebog256.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_streebog256.h
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inc_hash_streebog512.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_streebog512.h
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inc_hash_whirlpool.cl
OpenCL Runtime: Workaround a problem of the AMD OpenCL GPU driver under macOS which results in false negatives due to changes in the kernel crypto library
2021-07-05 11:33:12 +02:00
inc_hash_whirlpool.h
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inc_luks_aes.cl
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inc_luks_aes.h
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inc_luks_af.cl
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inc_luks_af.h
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inc_luks_essiv.cl
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inc_luks_essiv.h
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inc_luks_serpent.cl
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inc_luks_serpent.h
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inc_luks_twofish.cl
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inc_luks_twofish.h
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inc_luks_xts.cl
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inc_luks_xts.h
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inc_platform.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
inc_platform.h
Add missing backports from code base v6.2.2
2021-07-11 12:38:59 +02:00
inc_rp_optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
inc_rp_optimized.h
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inc_rp.cl
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inc_rp.h
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inc_scalar.cl
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inc_scalar.h
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inc_simd.cl
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inc_simd.h
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inc_truecrypt_crc32.cl
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inc_truecrypt_crc32.h
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inc_truecrypt_keyfile.cl
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inc_truecrypt_keyfile.h
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inc_truecrypt_xts.cl
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inc_truecrypt_xts.h
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inc_types.h
Limit max threads per block to 64 to enable offline compiler to make better use if available registers
2021-07-12 09:28:26 +02:00
inc_vendor.h
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
inc_veracrypt_keyfile.cl
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inc_veracrypt_keyfile.h
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inc_veracrypt_xts.cl
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inc_veracrypt_xts.h
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inc_zip_inflate.cl
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m00000_a0-optimized.cl
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m00000_a0-pure.cl
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m00000_a1-optimized.cl
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m00300_a3-optimized.cl
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m00300_a3-pure.cl
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m00400-optimized.cl
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m00400-pure.cl
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m00500-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m00500-pure.cl
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m00600_a0-optimized.cl
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m01470_a3-pure.cl
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m01500_a0-pure.cl
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m01500_a1-pure.cl
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m01500_a3-pure.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m01600-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m01600-pure.cl
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m01700_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01700_a0-pure.cl
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m01700_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01700_a1-pure.cl
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m01700_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01700_a3-pure.cl
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m01710_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01710_a0-pure.cl
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m01710_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01710_a1-pure.cl
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m01710_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01710_a3-pure.cl
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m01720_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01720_a0-pure.cl
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m01720_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01720_a1-pure.cl
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m01720_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01720_a3-pure.cl
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m01730_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01730_a0-pure.cl
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m01730_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01730_a1-pure.cl
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m01730_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01730_a3-pure.cl
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m01740_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01740_a0-pure.cl
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m01740_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m01740_a1-pure.cl
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m01740_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
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m02500-pure.cl
Merge branch 'HIP' into hip
2021-07-10 21:34:09 +02:00
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2021-07-14 17:06:20 +02:00
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m05600_a3-optimized.cl
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m05600_a3-pure.cl
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m05800-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m05800-pure.cl
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m06000_a0-optimized.cl
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m06300-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m06300-pure.cl
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Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07400-pure.cl
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m07700_a0-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07700_a1-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07700_a3-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07701_a0-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07701_a1-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07701_a3-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m07800_a0-optimized.cl
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m07801_a3-optimized.cl
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m07900-pure.cl
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m08000_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m08000_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m08000_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m08100_a0-optimized.cl
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Merge branch 'HIP' into hip
2021-07-10 21:34:09 +02:00
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m10500-pure.cl
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m10700-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m10700-pure.cl
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m10800_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m10800_a0-pure.cl
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m10800_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m10800_a1-pure.cl
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m10800_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m10800_a3-pure.cl
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m11600-pure.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
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m12300-pure.cl
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m12400-pure.cl
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m12500-optimized.cl
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m12500-pure.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m12600_a0-optimized.cl
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m13000-pure.cl
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m13100_a0-optimized.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m13100_a0-pure.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m13100_a1-optimized.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m13100_a1-pure.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m13100_a3-optimized.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m13100_a3-pure.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m13200-pure.cl
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KeePass: Increase supported size for KeePass 1 databases from 300kB to 16MB
2021-06-30 13:16:03 +02:00
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WinZip Kernel: Increase supported data length from 8k to 16mb
2021-07-15 16:42:29 +02:00
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m13772-pure.cl
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m13773-pure.cl
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m13800_a0-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m13800_a0-pure.cl
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m13800_a1-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m13800_a1-pure.cl
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m13800_a3-optimized.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m13800_a3-pure.cl
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m14000_a3-pure.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m14100_a0-pure.cl
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Merge branch 'HIP' into hip
2021-07-10 21:34:09 +02:00
m15900-pure.cl
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m16512_a0-pure.cl
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m16512_a1-pure.cl
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m16512_a3-pure.cl
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m16513_a0-pure.cl
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m16513_a1-pure.cl
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m16513_a3-pure.cl
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m16600_a0-optimized.cl
…
m16600_a0-pure.cl
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m16600_a1-optimized.cl
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m16600_a1-pure.cl
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m16600_a3-optimized.cl
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m16600_a3-pure.cl
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m16800-pure.cl
WPA Kernels: Increased performance by 3.5% for backend devices controlled by CUDA backend
2021-07-04 12:24:55 +02:00
m16801-pure.cl
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m16900-pure.cl
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m17200_a0-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17200_a1-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17200_a3-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17210_a0-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17210_a1-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17210_a3-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17220_a0-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17220_a1-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17220_a3-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17225_a0-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17225_a1-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17225_a3-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17230_a0-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17230_a1-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17230_a3-pure.cl
Fix address space of crc32tab[] in -m 172xx
2021-07-12 08:56:10 +02:00
m17300_a0-optimized.cl
…
m17300_a1-optimized.cl
…
m17300_a3-optimized.cl
…
m17400_a0-optimized.cl
…
m17400_a1-optimized.cl
…
m17400_a3-optimized.cl
…
m17500_a0-optimized.cl
…
m17500_a1-optimized.cl
…
m17500_a3-optimized.cl
…
m17600_a0-optimized.cl
…
m17600_a1-optimized.cl
…
m17600_a3-optimized.cl
…
m17700_a0-optimized.cl
…
m17700_a1-optimized.cl
…
m17700_a3-optimized.cl
…
m17800_a0-optimized.cl
…
m17800_a1-optimized.cl
…
m17800_a3-optimized.cl
…
m17900_a0-optimized.cl
…
m17900_a1-optimized.cl
…
m17900_a3-optimized.cl
…
m18000_a0-optimized.cl
…
m18000_a1-optimized.cl
…
m18000_a3-optimized.cl
…
m18100_a0-pure.cl
…
m18100_a1-pure.cl
…
m18100_a3-pure.cl
…
m18200_a0-optimized.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m18200_a0-pure.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m18200_a1-optimized.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m18200_a1-pure.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m18200_a3-optimized.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m18200_a3-pure.cl
Add rc4_next_16_global() and fix address space of edata buffer in -m 13100 and -m18200
2021-06-23 08:36:17 +02:00
m18300-pure.cl
…
m18400-pure.cl
…
m18500_a0-pure.cl
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m18500_a1-pure.cl
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m18500_a3-pure.cl
…
m18600-pure.cl
…
m18700_a0-optimized.cl
…
m18700_a0-pure.cl
…
m18700_a1-optimized.cl
…
m18700_a1-pure.cl
…
m18700_a3-optimized.cl
…
m18700_a3-pure.cl
…
m18800-pure.cl
…
m18900-pure.cl
…
m19000-pure.cl
…
m19100-pure.cl
…
m19200-pure.cl
…
m19300_a0-pure.cl
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m19300_a1-pure.cl
…
m19300_a3-pure.cl
…
m19500_a0-pure.cl
…
m19500_a1-pure.cl
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m19500_a3-pure.cl
…
m19600-pure.cl
Fix variable declaration block level in -m 19600 and -m 19700
2021-07-13 22:22:53 +02:00
m19700-pure.cl
Fix variable declaration block level in -m 19600 and -m 19700
2021-07-13 22:22:53 +02:00
m19800-pure.cl
…
m19900-pure.cl
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m20011-pure.cl
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m20012-pure.cl
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m20013-pure.cl
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m20500_a0-pure.cl
…
m20500_a1-pure.cl
…
m20500_a3-pure.cl
…
m20510_a0-pure.cl
…
m20510_a1-pure.cl
…
m20510_a3-pure.cl
…
m20600-pure.cl
…
m20710_a0-optimized.cl
…
m20710_a0-pure.cl
…
m20710_a1-optimized.cl
…
m20710_a1-pure.cl
…
m20710_a3-optimized.cl
…
m20710_a3-pure.cl
…
m20720_a0-pure.cl
…
m20720_a1-pure.cl
…
m20720_a3-pure.cl
…
m20800_a0-optimized.cl
…
m20800_a0-pure.cl
…
m20800_a1-optimized.cl
…
m20800_a1-pure.cl
…
m20800_a3-optimized.cl
…
m20800_a3-pure.cl
…
m20900_a0-optimized.cl
…
m20900_a0-pure.cl
…
m20900_a1-optimized.cl
…
m20900_a1-pure.cl
…
m20900_a3-optimized.cl
…
m20900_a3-pure.cl
…
m21000_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m21000_a0-pure.cl
…
m21000_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m21000_a1-pure.cl
…
m21000_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m21000_a3-pure.cl
…
m21100_a0-optimized.cl
…
m21100_a0-pure.cl
…
m21100_a1-optimized.cl
…
m21100_a1-pure.cl
…
m21100_a3-optimized.cl
…
m21100_a3-pure.cl
…
m21200_a0-optimized.cl
…
m21200_a0-pure.cl
…
m21200_a1-optimized.cl
…
m21200_a1-pure.cl
…
m21200_a3-optimized.cl
…
m21200_a3-pure.cl
…
m21300_a0-pure.cl
…
m21300_a1-pure.cl
…
m21300_a3-pure.cl
…
m21400_a0-optimized.cl
…
m21400_a0-pure.cl
…
m21400_a1-optimized.cl
…
m21400_a1-pure.cl
…
m21400_a3-optimized.cl
…
m21400_a3-pure.cl
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m21500-pure.cl
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m21600-pure.cl
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m21700-pure.cl
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m21800-pure.cl
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m22000-pure.cl
Merge branch 'HIP' into hip
2021-07-10 21:34:09 +02:00
m22001-pure.cl
Merge branch 'HIP' into hip
2021-07-10 21:34:09 +02:00
m22100-pure.cl
…
m22200_a0-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m22200_a0-pure.cl
…
m22200_a1-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m22200_a1-pure.cl
…
m22200_a3-optimized.cl
Backport more ROCm based optimizations to HIP
2021-07-15 23:34:27 +02:00
m22200_a3-pure.cl
…
m22300_a0-optimized.cl
…
m22300_a0-pure.cl
…
m22300_a1-optimized.cl
…
m22300_a1-pure.cl
…
m22300_a3-optimized.cl
…
m22300_a3-pure.cl
…
m22400-pure.cl
…
m22500_a0-optimized.cl
…
m22500_a0-pure.cl
…
m22500_a1-optimized.cl
…
m22500_a1-pure.cl
…
m22500_a3-optimized.cl
…
m22500_a3-pure.cl
…
m22600-pure.cl
…
m22700-pure.cl
Merge branch 'HIP' into hip
2021-07-10 21:34:09 +02:00
m22911_a0-pure.cl
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m22911_a1-pure.cl
…
m22911_a3-pure.cl
…
m22921_a0-pure.cl
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m22921_a1-pure.cl
…
m22921_a3-pure.cl
…
m22931_a0-pure.cl
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m22931_a1-pure.cl
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m22931_a3-pure.cl
…
m22941_a0-pure.cl
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m22941_a1-pure.cl
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m22941_a3-pure.cl
…
m22951_a0-pure.cl
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m22951_a1-pure.cl
…
m22951_a3-pure.cl
…
m23001_a0-optimized.cl
…
m23001_a0-pure.cl
…
m23001_a1-optimized.cl
…
m23001_a1-pure.cl
…
m23001_a3-optimized.cl
…
m23001_a3-pure.cl
…
m23002_a0-optimized.cl
…
m23002_a0-pure.cl
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m23002_a1-optimized.cl
…
m23002_a1-pure.cl
…
m23002_a3-optimized.cl
…
m23002_a3-pure.cl
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m23003_a0-optimized.cl
…
m23003_a0-pure.cl
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m23003_a1-optimized.cl
…
m23003_a1-pure.cl
…
m23003_a3-optimized.cl
…
m23003_a3-pure.cl
…
m23100-pure.cl
…
m23200-pure.cl
…
m23300-pure.cl
…
m23400-pure.cl
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m23500-pure.cl
…
m23600-pure.cl
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m23700-optimized.cl
…
m23700-pure.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m23800-optimized.cl
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m23800-pure.cl
Update large switch() cases in inc_common.cl and some inline assembly common functions for devices managed with HIP backend
2021-07-14 17:06:20 +02:00
m23900-pure.cl
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m24100-pure.cl
…
m24200-pure.cl
…
m24300_a0-optimized.cl
…
m24300_a0-pure.cl
…
m24300_a1-optimized.cl
…
m24300_a1-pure.cl
…
m24300_a3-optimized.cl
…
m24300_a3-pure.cl
…
m24410-pure.cl
…
m24420-pure.cl
…
m24500-pure.cl
…
m24610-pure.cl
…
m24620-pure.cl
…
m24630-pure.cl
…
m24700_a0-optimized.cl
…
m24700_a0-pure.cl
…
m24700_a1-optimized.cl
…
m24700_a1-pure.cl
…
m24700_a3-optimized.cl
…
m24700_a3-pure.cl
…
m24800_a0-optimized.cl
…
m24800_a0-pure.cl
…
m24800_a1-optimized.cl
…
m24800_a1-pure.cl
…
m24800_a3-optimized.cl
…
m24800_a3-pure.cl
…
m24900_a0-optimized.cl
…
m24900_a1-optimized.cl
…
m24900_a3-optimized.cl
…
m25300-pure.cl
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m25400-pure.cl
…
m25500-pure.cl
…
m25600-pure.cl
Fix password address space in m25600_init kernel
2021-07-07 10:35:41 +02:00
m25700_a0-optimized.cl
…
m25700_a1-optimized.cl
…
m25700_a3-optimized.cl
…
m25800-pure.cl
Bcrypt-SHA1/MD5 Kernels: Get rid of local memory use for binary to hex conversion to avoid false negatives on several OpenCL runtimes
2021-07-06 12:53:38 +02:00
m25900-pure.cl
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m26000_a0-pure.cl
…
m26000_a1-pure.cl
…
m26000_a3-pure.cl
…
m26100-pure.cl
…
m26200_a0-pure.cl
…
m26200_a1-pure.cl
…
m26200_a3-pure.cl
…
m26300_a0-pure.cl
…
m26300_a1-pure.cl
…
m26300_a3-pure.cl
…
m26401_a0-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26401_a1-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26401_a3-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26402_a0-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26402_a1-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26402_a3-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26403_a0-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26403_a1-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26403_a3-optimized.cl
Added hash-mode: AES-128/192/256-ECB NOKDF
2021-06-26 17:12:10 +02:00
m26500-pure.cl
Added hash-mode: iPhone passcode (UID key + System Keybag)
2021-07-03 19:03:06 +02:00
m26600-pure.cl
add min/max data length limits to MetaMask Wallet
2021-07-04 20:14:25 +02:00
markov_be.cl
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markov_le.cl
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shared.cl
Add missing backports from code base v6.2.2
2021-07-11 12:38:59 +02:00