Create real opencl.c to better distinguish between opencl helper functions and library handling functions
This commit is contained in:
jsteube
@@ -8,8 +8,6 @@
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#ifndef _EXT_OPENCL_H
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#define _EXT_OPENCL_H
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#include <stdio.h>
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#define CL_USE_DEPRECATED_OPENCL_1_2_APIS
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#define CL_USE_DEPRECATED_OPENCL_2_0_APIS
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@@ -31,208 +29,6 @@
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#define CL_PLATFORMS_MAX 16
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static const char CL_VENDOR_AMD[] = "Advanced Micro Devices, Inc.";
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static const char CL_VENDOR_AMD_USE_INTEL[] = "GenuineIntel";
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static const char CL_VENDOR_APPLE[] = "Apple";
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static const char CL_VENDOR_INTEL_BEIGNET[] = "Intel";
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static const char CL_VENDOR_INTEL_SDK[] = "Intel(R) Corporation";
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static const char CL_VENDOR_MESA[] = "Mesa";
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static const char CL_VENDOR_NV[] = "NVIDIA Corporation";
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static const char CL_VENDOR_POCL[] = "The pocl project";
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typedef enum vendor_id
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{
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VENDOR_ID_AMD = (1 << 0),
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VENDOR_ID_APPLE = (1 << 1),
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VENDOR_ID_INTEL_BEIGNET = (1 << 2),
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VENDOR_ID_INTEL_SDK = (1 << 3),
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VENDOR_ID_MESA = (1 << 4),
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VENDOR_ID_NV = (1 << 5),
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VENDOR_ID_POCL = (1 << 6),
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VENDOR_ID_AMD_USE_INTEL = (1 << 7),
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VENDOR_ID_GENERIC = (1 << 31)
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} vendor_id_t;
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typedef struct __hc_device_param hc_device_param_t;
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struct __hc_device_param
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{
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cl_device_id device;
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cl_device_type device_type;
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uint device_id;
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uint platform_devices_id; // for mapping with hms devices
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bool skipped;
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uint sm_major;
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uint sm_minor;
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uint kernel_exec_timeout;
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uint device_processors;
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u64 device_maxmem_alloc;
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u64 device_global_mem;
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u32 device_maxclock_frequency;
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size_t device_maxworkgroup_size;
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uint vector_width;
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uint kernel_threads;
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uint kernel_loops;
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uint kernel_accel;
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uint kernel_loops_min;
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uint kernel_loops_max;
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uint kernel_accel_min;
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uint kernel_accel_max;
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uint kernel_power;
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uint hardware_power;
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size_t size_pws;
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size_t size_tmps;
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size_t size_hooks;
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size_t size_bfs;
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size_t size_combs;
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size_t size_rules;
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size_t size_rules_c;
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size_t size_root_css;
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size_t size_markov_css;
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size_t size_digests;
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size_t size_salts;
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size_t size_shown;
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size_t size_results;
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size_t size_plains;
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FILE *combs_fp;
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comb_t *combs_buf;
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void *hooks_buf;
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pw_t *pws_buf;
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uint pws_cnt;
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u64 words_off;
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u64 words_done;
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uint outerloop_pos;
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uint outerloop_left;
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uint innerloop_pos;
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uint innerloop_left;
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uint exec_pos;
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double exec_ms[EXEC_CACHE];
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// workaround cpu spinning
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double exec_us_prev1[EXPECTED_ITERATIONS];
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double exec_us_prev2[EXPECTED_ITERATIONS];
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double exec_us_prev3[EXPECTED_ITERATIONS];
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// this is "current" speed
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uint speed_pos;
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u64 speed_cnt[SPEED_CACHE];
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double speed_ms[SPEED_CACHE];
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hc_timer_t timer_speed;
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// device specific attributes starting
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char *device_name;
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char *device_vendor;
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char *device_name_chksum;
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char *device_version;
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char *driver_version;
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bool opencl_v12;
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double nvidia_spin_damp;
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cl_platform_id platform;
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cl_uint device_vendor_id;
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cl_uint platform_vendor_id;
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cl_kernel kernel1;
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cl_kernel kernel12;
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cl_kernel kernel2;
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cl_kernel kernel23;
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cl_kernel kernel3;
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cl_kernel kernel_mp;
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cl_kernel kernel_mp_l;
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cl_kernel kernel_mp_r;
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cl_kernel kernel_amp;
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cl_kernel kernel_tm;
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cl_kernel kernel_weak;
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cl_kernel kernel_memset;
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cl_context context;
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cl_program program;
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cl_program program_mp;
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cl_program program_amp;
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cl_command_queue command_queue;
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cl_mem d_pws_buf;
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cl_mem d_pws_amp_buf;
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cl_mem d_words_buf_l;
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cl_mem d_words_buf_r;
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cl_mem d_rules;
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cl_mem d_rules_c;
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cl_mem d_combs;
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cl_mem d_combs_c;
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cl_mem d_bfs;
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cl_mem d_bfs_c;
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cl_mem d_tm_c;
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cl_mem d_bitmap_s1_a;
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cl_mem d_bitmap_s1_b;
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cl_mem d_bitmap_s1_c;
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cl_mem d_bitmap_s1_d;
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cl_mem d_bitmap_s2_a;
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cl_mem d_bitmap_s2_b;
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cl_mem d_bitmap_s2_c;
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cl_mem d_bitmap_s2_d;
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cl_mem d_plain_bufs;
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cl_mem d_digests_buf;
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cl_mem d_digests_shown;
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cl_mem d_salt_bufs;
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cl_mem d_esalt_bufs;
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cl_mem d_bcrypt_bufs;
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cl_mem d_tmps;
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cl_mem d_hooks;
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cl_mem d_result;
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cl_mem d_scryptV0_buf;
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cl_mem d_scryptV1_buf;
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cl_mem d_scryptV2_buf;
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cl_mem d_scryptV3_buf;
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cl_mem d_root_css_buf;
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cl_mem d_markov_css_buf;
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void *kernel_params[PARAMCNT];
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void *kernel_params_mp[PARAMCNT];
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void *kernel_params_mp_r[PARAMCNT];
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void *kernel_params_mp_l[PARAMCNT];
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void *kernel_params_amp[PARAMCNT];
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void *kernel_params_tm[PARAMCNT];
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void *kernel_params_memset[PARAMCNT];
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u32 kernel_params_buf32[PARAMCNT];
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u32 kernel_params_mp_buf32[PARAMCNT];
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u64 kernel_params_mp_buf64[PARAMCNT];
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u32 kernel_params_mp_r_buf32[PARAMCNT];
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u64 kernel_params_mp_r_buf64[PARAMCNT];
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u32 kernel_params_mp_l_buf32[PARAMCNT];
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u64 kernel_params_mp_l_buf64[PARAMCNT];
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u32 kernel_params_amp_buf32[PARAMCNT];
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u32 kernel_params_memset_buf32[PARAMCNT];
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};
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typedef cl_int (CL_API_CALL *OCL_CLBUILDPROGRAM) (cl_program, cl_uint, const cl_device_id *, const char *, void (CL_CALLBACK *)(cl_program, void *), void *);
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typedef cl_mem (CL_API_CALL *OCL_CLCREATEBUFFER) (cl_context, cl_mem_flags, size_t, void *, cl_int *);
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typedef cl_command_queue (CL_API_CALL *OCL_CLCREATECOMMANDQUEUE) (cl_context, cl_device_id, cl_command_queue_properties, cl_int *);
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@@ -0,0 +1,219 @@
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/**
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* Authors.....: Jens Steube <jens.steube@gmail.com>
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* Gabriele Gristina <matrix@hashcat.net>
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*
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* License.....: MIT
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*/
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#ifndef _OPENCL_H
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#define _OPENCL_H
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#include <stdio.h>
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static const char CL_VENDOR_AMD[] = "Advanced Micro Devices, Inc.";
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static const char CL_VENDOR_AMD_USE_INTEL[] = "GenuineIntel";
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static const char CL_VENDOR_APPLE[] = "Apple";
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static const char CL_VENDOR_INTEL_BEIGNET[] = "Intel";
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static const char CL_VENDOR_INTEL_SDK[] = "Intel(R) Corporation";
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static const char CL_VENDOR_MESA[] = "Mesa";
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static const char CL_VENDOR_NV[] = "NVIDIA Corporation";
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static const char CL_VENDOR_POCL[] = "The pocl project";
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typedef enum vendor_id
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{
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VENDOR_ID_AMD = (1 << 0),
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VENDOR_ID_APPLE = (1 << 1),
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VENDOR_ID_INTEL_BEIGNET = (1 << 2),
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VENDOR_ID_INTEL_SDK = (1 << 3),
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VENDOR_ID_MESA = (1 << 4),
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VENDOR_ID_NV = (1 << 5),
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VENDOR_ID_POCL = (1 << 6),
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VENDOR_ID_AMD_USE_INTEL = (1 << 7),
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VENDOR_ID_GENERIC = (1 << 31)
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} vendor_id_t;
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typedef struct __hc_device_param hc_device_param_t;
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struct __hc_device_param
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{
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cl_device_id device;
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cl_device_type device_type;
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uint device_id;
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uint platform_devices_id; // for mapping with hms devices
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bool skipped;
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uint sm_major;
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uint sm_minor;
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uint kernel_exec_timeout;
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uint device_processors;
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u64 device_maxmem_alloc;
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u64 device_global_mem;
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u32 device_maxclock_frequency;
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size_t device_maxworkgroup_size;
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uint vector_width;
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uint kernel_threads;
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uint kernel_loops;
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uint kernel_accel;
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uint kernel_loops_min;
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uint kernel_loops_max;
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uint kernel_accel_min;
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uint kernel_accel_max;
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uint kernel_power;
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uint hardware_power;
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size_t size_pws;
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size_t size_tmps;
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size_t size_hooks;
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size_t size_bfs;
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size_t size_combs;
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size_t size_rules;
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size_t size_rules_c;
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size_t size_root_css;
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size_t size_markov_css;
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size_t size_digests;
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size_t size_salts;
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size_t size_shown;
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size_t size_results;
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size_t size_plains;
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FILE *combs_fp;
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comb_t *combs_buf;
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void *hooks_buf;
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pw_t *pws_buf;
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uint pws_cnt;
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u64 words_off;
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u64 words_done;
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uint outerloop_pos;
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uint outerloop_left;
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uint innerloop_pos;
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uint innerloop_left;
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uint exec_pos;
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double exec_ms[EXEC_CACHE];
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// workaround cpu spinning
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double exec_us_prev1[EXPECTED_ITERATIONS];
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double exec_us_prev2[EXPECTED_ITERATIONS];
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double exec_us_prev3[EXPECTED_ITERATIONS];
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// this is "current" speed
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uint speed_pos;
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u64 speed_cnt[SPEED_CACHE];
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double speed_ms[SPEED_CACHE];
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hc_timer_t timer_speed;
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// device specific attributes starting
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char *device_name;
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char *device_vendor;
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char *device_name_chksum;
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char *device_version;
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char *driver_version;
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bool opencl_v12;
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double nvidia_spin_damp;
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cl_platform_id platform;
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cl_uint device_vendor_id;
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cl_uint platform_vendor_id;
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cl_kernel kernel1;
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cl_kernel kernel12;
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cl_kernel kernel2;
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cl_kernel kernel23;
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cl_kernel kernel3;
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cl_kernel kernel_mp;
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cl_kernel kernel_mp_l;
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cl_kernel kernel_mp_r;
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cl_kernel kernel_amp;
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cl_kernel kernel_tm;
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cl_kernel kernel_weak;
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cl_kernel kernel_memset;
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cl_context context;
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cl_program program;
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cl_program program_mp;
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cl_program program_amp;
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cl_command_queue command_queue;
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cl_mem d_pws_buf;
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cl_mem d_pws_amp_buf;
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cl_mem d_words_buf_l;
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cl_mem d_words_buf_r;
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cl_mem d_rules;
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cl_mem d_rules_c;
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cl_mem d_combs;
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cl_mem d_combs_c;
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cl_mem d_bfs;
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cl_mem d_bfs_c;
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cl_mem d_tm_c;
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cl_mem d_bitmap_s1_a;
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cl_mem d_bitmap_s1_b;
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cl_mem d_bitmap_s1_c;
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cl_mem d_bitmap_s1_d;
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cl_mem d_bitmap_s2_a;
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cl_mem d_bitmap_s2_b;
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cl_mem d_bitmap_s2_c;
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cl_mem d_bitmap_s2_d;
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cl_mem d_plain_bufs;
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cl_mem d_digests_buf;
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cl_mem d_digests_shown;
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cl_mem d_salt_bufs;
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cl_mem d_esalt_bufs;
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cl_mem d_bcrypt_bufs;
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cl_mem d_tmps;
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cl_mem d_hooks;
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cl_mem d_result;
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cl_mem d_scryptV0_buf;
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cl_mem d_scryptV1_buf;
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cl_mem d_scryptV2_buf;
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cl_mem d_scryptV3_buf;
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cl_mem d_root_css_buf;
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cl_mem d_markov_css_buf;
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void *kernel_params[PARAMCNT];
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void *kernel_params_mp[PARAMCNT];
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void *kernel_params_mp_r[PARAMCNT];
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void *kernel_params_mp_l[PARAMCNT];
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void *kernel_params_amp[PARAMCNT];
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void *kernel_params_tm[PARAMCNT];
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void *kernel_params_memset[PARAMCNT];
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u32 kernel_params_buf32[PARAMCNT];
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u32 kernel_params_mp_buf32[PARAMCNT];
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u64 kernel_params_mp_buf64[PARAMCNT];
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u32 kernel_params_mp_r_buf32[PARAMCNT];
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u64 kernel_params_mp_r_buf64[PARAMCNT];
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u32 kernel_params_mp_l_buf32[PARAMCNT];
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u64 kernel_params_mp_l_buf64[PARAMCNT];
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u32 kernel_params_amp_buf32[PARAMCNT];
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u32 kernel_params_memset_buf32[PARAMCNT];
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};
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#endif // _OPENCL_H
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uint setup_opencl_platforms_filter (char *opencl_platforms);
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u32 setup_devices_filter (char *opencl_devices);
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cl_device_type setup_device_types_filter (char *opencl_device_types);
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@@ -146,10 +146,6 @@ void handle_left_request (pot_t *pot, uint pot_cnt, char *input_buf, int input_l
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void handle_show_request_lm (pot_t *pot, uint pot_cnt, char *input_buf, int input_len, hash_t *hash_left, hash_t *hash_right, int (*sort_by_pot) (const void *, const void *), FILE *out_fp);
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void handle_left_request_lm (pot_t *pot, uint pot_cnt, char *input_buf, int input_len, hash_t *hash_left, hash_t *hash_right, int (*sort_by_pot) (const void *, const void *), FILE *out_fp);
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u32 setup_opencl_platforms_filter (char *opencl_platforms);
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u32 setup_devices_filter (char *opencl_devices);
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cl_device_type setup_device_types_filter (char *opencl_device_types);
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u32 get_random_num (const u32 min, const u32 max);
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u32 mydivc32 (const u32 dividend, const u32 divisor);
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