From 521ece537c1fde0cc472ec4678ae2e79e15683d6 Mon Sep 17 00:00:00 2001 From: jsteube Date: Sun, 2 Jul 2017 15:08:01 +0200 Subject: [PATCH] Replace code in switch_buffer_by_offset_64x1_le_S() in amp_a1.cl with generated code from code generators --- OpenCL/amp_a1.cl | 2590 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 2590 insertions(+) diff --git a/OpenCL/amp_a1.cl b/OpenCL/amp_a1.cl index 6f8e18c51..12f5da5ef 100644 --- a/OpenCL/amp_a1.cl +++ b/OpenCL/amp_a1.cl @@ -81,7 +81,77 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = amd_bytealign_S (w[ 2], w[ 1], offset_minus_4); w[ 1] = amd_bytealign_S (w[ 1], w[ 0], offset_minus_4); w[ 0] = amd_bytealign_S (w[ 0], 0, offset_minus_4); + + if (offset_mod_4 == 0) + { + w[ 0] = w[ 1]; + w[ 1] = w[ 2]; + w[ 2] = w[ 3]; + w[ 3] = w[ 4]; + w[ 4] = w[ 5]; + w[ 5] = w[ 6]; + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 1: w[63] = amd_bytealign_S (w[62], w[61], offset_minus_4); w[62] = amd_bytealign_S (w[61], w[60], offset_minus_4); @@ -147,7 +217,76 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = amd_bytealign_S (w[ 1], w[ 0], offset_minus_4); w[ 1] = amd_bytealign_S (w[ 0], 0, offset_minus_4); w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 1] = w[ 2]; + w[ 2] = w[ 3]; + w[ 3] = w[ 4]; + w[ 4] = w[ 5]; + w[ 5] = w[ 6]; + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 2: w[63] = amd_bytealign_S (w[61], w[60], offset_minus_4); w[62] = amd_bytealign_S (w[60], w[59], offset_minus_4); @@ -213,7 +352,75 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = amd_bytealign_S (w[ 0], 0, offset_minus_4); w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 2] = w[ 3]; + w[ 3] = w[ 4]; + w[ 4] = w[ 5]; + w[ 5] = w[ 6]; + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 3: w[63] = amd_bytealign_S (w[60], w[59], offset_minus_4); w[62] = amd_bytealign_S (w[59], w[58], offset_minus_4); @@ -279,7 +486,74 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 3] = w[ 4]; + w[ 4] = w[ 5]; + w[ 5] = w[ 6]; + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 4: w[63] = amd_bytealign_S (w[59], w[58], offset_minus_4); w[62] = amd_bytealign_S (w[58], w[57], offset_minus_4); @@ -345,7 +619,73 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 4] = w[ 5]; + w[ 5] = w[ 6]; + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 5: w[63] = amd_bytealign_S (w[58], w[57], offset_minus_4); w[62] = amd_bytealign_S (w[57], w[56], offset_minus_4); @@ -411,7 +751,72 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 5] = w[ 6]; + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 6: w[63] = amd_bytealign_S (w[57], w[56], offset_minus_4); w[62] = amd_bytealign_S (w[56], w[55], offset_minus_4); @@ -477,7 +882,71 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 6] = w[ 7]; + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 7: w[63] = amd_bytealign_S (w[56], w[55], offset_minus_4); w[62] = amd_bytealign_S (w[55], w[54], offset_minus_4); @@ -543,7 +1012,70 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 7] = w[ 8]; + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 8: w[63] = amd_bytealign_S (w[55], w[54], offset_minus_4); w[62] = amd_bytealign_S (w[54], w[53], offset_minus_4); @@ -609,7 +1141,69 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 8] = w[ 9]; + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 9: w[63] = amd_bytealign_S (w[54], w[53], offset_minus_4); w[62] = amd_bytealign_S (w[53], w[52], offset_minus_4); @@ -675,7 +1269,68 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[ 9] = w[10]; + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 10: w[63] = amd_bytealign_S (w[53], w[52], offset_minus_4); w[62] = amd_bytealign_S (w[52], w[51], offset_minus_4); @@ -741,7 +1396,67 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[10] = w[11]; + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 11: w[63] = amd_bytealign_S (w[52], w[51], offset_minus_4); w[62] = amd_bytealign_S (w[51], w[50], offset_minus_4); @@ -807,7 +1522,66 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[11] = w[12]; + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 12: w[63] = amd_bytealign_S (w[51], w[50], offset_minus_4); w[62] = amd_bytealign_S (w[50], w[49], offset_minus_4); @@ -873,7 +1647,65 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[12] = w[13]; + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 13: w[63] = amd_bytealign_S (w[50], w[49], offset_minus_4); w[62] = amd_bytealign_S (w[49], w[48], offset_minus_4); @@ -939,7 +1771,64 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[13] = w[14]; + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 14: w[63] = amd_bytealign_S (w[49], w[48], offset_minus_4); w[62] = amd_bytealign_S (w[48], w[47], offset_minus_4); @@ -1005,7 +1894,63 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[14] = w[15]; + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 15: w[63] = amd_bytealign_S (w[48], w[47], offset_minus_4); w[62] = amd_bytealign_S (w[47], w[46], offset_minus_4); @@ -1071,7 +2016,62 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[15] = w[16]; + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 16: w[63] = amd_bytealign_S (w[47], w[46], offset_minus_4); w[62] = amd_bytealign_S (w[46], w[45], offset_minus_4); @@ -1137,7 +2137,61 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[16] = w[17]; + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 17: w[63] = amd_bytealign_S (w[46], w[45], offset_minus_4); w[62] = amd_bytealign_S (w[45], w[44], offset_minus_4); @@ -1203,7 +2257,60 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[17] = w[18]; + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 18: w[63] = amd_bytealign_S (w[45], w[44], offset_minus_4); w[62] = amd_bytealign_S (w[44], w[43], offset_minus_4); @@ -1269,7 +2376,59 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[18] = w[19]; + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 19: w[63] = amd_bytealign_S (w[44], w[43], offset_minus_4); w[62] = amd_bytealign_S (w[43], w[42], offset_minus_4); @@ -1335,7 +2494,58 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[19] = w[20]; + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 20: w[63] = amd_bytealign_S (w[43], w[42], offset_minus_4); w[62] = amd_bytealign_S (w[42], w[41], offset_minus_4); @@ -1401,7 +2611,57 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[20] = w[21]; + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 21: w[63] = amd_bytealign_S (w[42], w[41], offset_minus_4); w[62] = amd_bytealign_S (w[41], w[40], offset_minus_4); @@ -1467,7 +2727,56 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[21] = w[22]; + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 22: w[63] = amd_bytealign_S (w[41], w[40], offset_minus_4); w[62] = amd_bytealign_S (w[40], w[39], offset_minus_4); @@ -1533,7 +2842,55 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[22] = w[23]; + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 23: w[63] = amd_bytealign_S (w[40], w[39], offset_minus_4); w[62] = amd_bytealign_S (w[39], w[38], offset_minus_4); @@ -1599,7 +2956,54 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[23] = w[24]; + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 24: w[63] = amd_bytealign_S (w[39], w[38], offset_minus_4); w[62] = amd_bytealign_S (w[38], w[37], offset_minus_4); @@ -1665,7 +3069,53 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[24] = w[25]; + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 25: w[63] = amd_bytealign_S (w[38], w[37], offset_minus_4); w[62] = amd_bytealign_S (w[37], w[36], offset_minus_4); @@ -1731,7 +3181,52 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[25] = w[26]; + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 26: w[63] = amd_bytealign_S (w[37], w[36], offset_minus_4); w[62] = amd_bytealign_S (w[36], w[35], offset_minus_4); @@ -1797,7 +3292,51 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[26] = w[27]; + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 27: w[63] = amd_bytealign_S (w[36], w[35], offset_minus_4); w[62] = amd_bytealign_S (w[35], w[34], offset_minus_4); @@ -1863,7 +3402,50 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[27] = w[28]; + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 28: w[63] = amd_bytealign_S (w[35], w[34], offset_minus_4); w[62] = amd_bytealign_S (w[34], w[33], offset_minus_4); @@ -1929,7 +3511,49 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[28] = w[29]; + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 29: w[63] = amd_bytealign_S (w[34], w[33], offset_minus_4); w[62] = amd_bytealign_S (w[33], w[32], offset_minus_4); @@ -1995,7 +3619,48 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[29] = w[30]; + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 30: w[63] = amd_bytealign_S (w[33], w[32], offset_minus_4); w[62] = amd_bytealign_S (w[32], w[31], offset_minus_4); @@ -2061,7 +3726,47 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[30] = w[31]; + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 31: w[63] = amd_bytealign_S (w[32], w[31], offset_minus_4); w[62] = amd_bytealign_S (w[31], w[30], offset_minus_4); @@ -2127,7 +3832,46 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[31] = w[32]; + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 32: w[63] = amd_bytealign_S (w[31], w[30], offset_minus_4); w[62] = amd_bytealign_S (w[30], w[29], offset_minus_4); @@ -2193,7 +3937,45 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[32] = w[33]; + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 33: w[63] = amd_bytealign_S (w[30], w[29], offset_minus_4); w[62] = amd_bytealign_S (w[29], w[28], offset_minus_4); @@ -2259,7 +4041,44 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[33] = w[34]; + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 34: w[63] = amd_bytealign_S (w[29], w[28], offset_minus_4); w[62] = amd_bytealign_S (w[28], w[27], offset_minus_4); @@ -2325,7 +4144,43 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[34] = w[35]; + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 35: w[63] = amd_bytealign_S (w[28], w[27], offset_minus_4); w[62] = amd_bytealign_S (w[27], w[26], offset_minus_4); @@ -2391,7 +4246,42 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[35] = w[36]; + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 36: w[63] = amd_bytealign_S (w[27], w[26], offset_minus_4); w[62] = amd_bytealign_S (w[26], w[25], offset_minus_4); @@ -2457,7 +4347,41 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[36] = w[37]; + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 37: w[63] = amd_bytealign_S (w[26], w[25], offset_minus_4); w[62] = amd_bytealign_S (w[25], w[24], offset_minus_4); @@ -2523,7 +4447,40 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[37] = w[38]; + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 38: w[63] = amd_bytealign_S (w[25], w[24], offset_minus_4); w[62] = amd_bytealign_S (w[24], w[23], offset_minus_4); @@ -2589,7 +4546,39 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[38] = w[39]; + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 39: w[63] = amd_bytealign_S (w[24], w[23], offset_minus_4); w[62] = amd_bytealign_S (w[23], w[22], offset_minus_4); @@ -2655,7 +4644,38 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[39] = w[40]; + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 40: w[63] = amd_bytealign_S (w[23], w[22], offset_minus_4); w[62] = amd_bytealign_S (w[22], w[21], offset_minus_4); @@ -2721,7 +4741,37 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[40] = w[41]; + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 41: w[63] = amd_bytealign_S (w[22], w[21], offset_minus_4); w[62] = amd_bytealign_S (w[21], w[20], offset_minus_4); @@ -2787,7 +4837,36 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[41] = w[42]; + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 42: w[63] = amd_bytealign_S (w[21], w[20], offset_minus_4); w[62] = amd_bytealign_S (w[20], w[19], offset_minus_4); @@ -2853,7 +4932,35 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[42] = w[43]; + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 43: w[63] = amd_bytealign_S (w[20], w[19], offset_minus_4); w[62] = amd_bytealign_S (w[19], w[18], offset_minus_4); @@ -2919,7 +5026,34 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[43] = w[44]; + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 44: w[63] = amd_bytealign_S (w[19], w[18], offset_minus_4); w[62] = amd_bytealign_S (w[18], w[17], offset_minus_4); @@ -2985,7 +5119,33 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[44] = w[45]; + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 45: w[63] = amd_bytealign_S (w[18], w[17], offset_minus_4); w[62] = amd_bytealign_S (w[17], w[16], offset_minus_4); @@ -3051,7 +5211,32 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[45] = w[46]; + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 46: w[63] = amd_bytealign_S (w[17], w[16], offset_minus_4); w[62] = amd_bytealign_S (w[16], w[15], offset_minus_4); @@ -3117,7 +5302,31 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[46] = w[47]; + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 47: w[63] = amd_bytealign_S (w[16], w[15], offset_minus_4); w[62] = amd_bytealign_S (w[15], w[14], offset_minus_4); @@ -3183,7 +5392,30 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[47] = w[48]; + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 48: w[63] = amd_bytealign_S (w[15], w[14], offset_minus_4); w[62] = amd_bytealign_S (w[14], w[13], offset_minus_4); @@ -3249,7 +5481,29 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[48] = w[49]; + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 49: w[63] = amd_bytealign_S (w[14], w[13], offset_minus_4); w[62] = amd_bytealign_S (w[13], w[12], offset_minus_4); @@ -3315,7 +5569,28 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[49] = w[50]; + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 50: w[63] = amd_bytealign_S (w[13], w[12], offset_minus_4); w[62] = amd_bytealign_S (w[12], w[11], offset_minus_4); @@ -3381,7 +5656,27 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[50] = w[51]; + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 51: w[63] = amd_bytealign_S (w[12], w[11], offset_minus_4); w[62] = amd_bytealign_S (w[11], w[10], offset_minus_4); @@ -3447,7 +5742,26 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[51] = w[52]; + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 52: w[63] = amd_bytealign_S (w[11], w[10], offset_minus_4); w[62] = amd_bytealign_S (w[10], w[ 9], offset_minus_4); @@ -3513,7 +5827,25 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[52] = w[53]; + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 53: w[63] = amd_bytealign_S (w[10], w[ 9], offset_minus_4); w[62] = amd_bytealign_S (w[ 9], w[ 8], offset_minus_4); @@ -3579,7 +5911,24 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[53] = w[54]; + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 54: w[63] = amd_bytealign_S (w[ 9], w[ 8], offset_minus_4); w[62] = amd_bytealign_S (w[ 8], w[ 7], offset_minus_4); @@ -3645,7 +5994,23 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[54] = w[55]; + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 55: w[63] = amd_bytealign_S (w[ 8], w[ 7], offset_minus_4); w[62] = amd_bytealign_S (w[ 7], w[ 6], offset_minus_4); @@ -3711,7 +6076,22 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[55] = w[56]; + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 56: w[63] = amd_bytealign_S (w[ 7], w[ 6], offset_minus_4); w[62] = amd_bytealign_S (w[ 6], w[ 5], offset_minus_4); @@ -3777,7 +6157,21 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[56] = w[57]; + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 57: w[63] = amd_bytealign_S (w[ 6], w[ 5], offset_minus_4); w[62] = amd_bytealign_S (w[ 5], w[ 4], offset_minus_4); @@ -3843,7 +6237,20 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[57] = w[58]; + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 58: w[63] = amd_bytealign_S (w[ 5], w[ 4], offset_minus_4); w[62] = amd_bytealign_S (w[ 4], w[ 3], offset_minus_4); @@ -3909,7 +6316,19 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[58] = w[59]; + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 59: w[63] = amd_bytealign_S (w[ 4], w[ 3], offset_minus_4); w[62] = amd_bytealign_S (w[ 3], w[ 2], offset_minus_4); @@ -3975,7 +6394,18 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[59] = w[60]; + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 60: w[63] = amd_bytealign_S (w[ 3], w[ 2], offset_minus_4); w[62] = amd_bytealign_S (w[ 2], w[ 1], offset_minus_4); @@ -4041,7 +6471,17 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[60] = w[61]; + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 61: w[63] = amd_bytealign_S (w[ 2], w[ 1], offset_minus_4); w[62] = amd_bytealign_S (w[ 1], w[ 0], offset_minus_4); @@ -4107,7 +6547,16 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[61] = w[62]; + w[62] = w[63]; + w[63] = 0; + } + break; + case 62: w[63] = amd_bytealign_S (w[ 1], w[ 0], offset_minus_4); w[62] = amd_bytealign_S (w[ 0], 0, offset_minus_4); @@ -4173,7 +6622,15 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[62] = w[63]; + w[63] = 0; + } + break; + case 63: w[63] = amd_bytealign_S (w[ 0], 0, offset_minus_4); w[62] = 0; @@ -4239,6 +6696,12 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + + if (offset_mod_4 == 0) + { + w[63] = 0; + } + break; } #endif @@ -4315,7 +6778,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = __byte_perm_S (w[ 1], w[ 2], selector); w[ 1] = __byte_perm_S (w[ 0], w[ 1], selector); w[ 0] = __byte_perm_S ( 0, w[ 0], selector); + break; + case 1: w[63] = __byte_perm_S (w[61], w[62], selector); w[62] = __byte_perm_S (w[60], w[61], selector); @@ -4381,7 +6846,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = __byte_perm_S (w[ 0], w[ 1], selector); w[ 1] = __byte_perm_S ( 0, w[ 0], selector); w[ 0] = 0; + break; + case 2: w[63] = __byte_perm_S (w[60], w[61], selector); w[62] = __byte_perm_S (w[59], w[60], selector); @@ -4447,7 +6914,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = __byte_perm_S ( 0, w[ 0], selector); w[ 1] = 0; w[ 0] = 0; + break; + case 3: w[63] = __byte_perm_S (w[59], w[60], selector); w[62] = __byte_perm_S (w[58], w[59], selector); @@ -4513,7 +6982,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 4: w[63] = __byte_perm_S (w[58], w[59], selector); w[62] = __byte_perm_S (w[57], w[58], selector); @@ -4579,7 +7050,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 5: w[63] = __byte_perm_S (w[57], w[58], selector); w[62] = __byte_perm_S (w[56], w[57], selector); @@ -4645,7 +7118,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 6: w[63] = __byte_perm_S (w[56], w[57], selector); w[62] = __byte_perm_S (w[55], w[56], selector); @@ -4711,7 +7186,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 7: w[63] = __byte_perm_S (w[55], w[56], selector); w[62] = __byte_perm_S (w[54], w[55], selector); @@ -4777,7 +7254,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 8: w[63] = __byte_perm_S (w[54], w[55], selector); w[62] = __byte_perm_S (w[53], w[54], selector); @@ -4843,7 +7322,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 9: w[63] = __byte_perm_S (w[53], w[54], selector); w[62] = __byte_perm_S (w[52], w[53], selector); @@ -4909,7 +7390,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 10: w[63] = __byte_perm_S (w[52], w[53], selector); w[62] = __byte_perm_S (w[51], w[52], selector); @@ -4975,7 +7458,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 11: w[63] = __byte_perm_S (w[51], w[52], selector); w[62] = __byte_perm_S (w[50], w[51], selector); @@ -5041,7 +7526,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 12: w[63] = __byte_perm_S (w[50], w[51], selector); w[62] = __byte_perm_S (w[49], w[50], selector); @@ -5107,7 +7594,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 13: w[63] = __byte_perm_S (w[49], w[50], selector); w[62] = __byte_perm_S (w[48], w[49], selector); @@ -5173,7 +7662,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 14: w[63] = __byte_perm_S (w[48], w[49], selector); w[62] = __byte_perm_S (w[47], w[48], selector); @@ -5239,7 +7730,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 15: w[63] = __byte_perm_S (w[47], w[48], selector); w[62] = __byte_perm_S (w[46], w[47], selector); @@ -5305,7 +7798,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 16: w[63] = __byte_perm_S (w[46], w[47], selector); w[62] = __byte_perm_S (w[45], w[46], selector); @@ -5371,7 +7866,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 17: w[63] = __byte_perm_S (w[45], w[46], selector); w[62] = __byte_perm_S (w[44], w[45], selector); @@ -5437,7 +7934,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 18: w[63] = __byte_perm_S (w[44], w[45], selector); w[62] = __byte_perm_S (w[43], w[44], selector); @@ -5503,7 +8002,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 19: w[63] = __byte_perm_S (w[43], w[44], selector); w[62] = __byte_perm_S (w[42], w[43], selector); @@ -5569,7 +8070,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 20: w[63] = __byte_perm_S (w[42], w[43], selector); w[62] = __byte_perm_S (w[41], w[42], selector); @@ -5635,7 +8138,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 21: w[63] = __byte_perm_S (w[41], w[42], selector); w[62] = __byte_perm_S (w[40], w[41], selector); @@ -5701,7 +8206,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 22: w[63] = __byte_perm_S (w[40], w[41], selector); w[62] = __byte_perm_S (w[39], w[40], selector); @@ -5767,7 +8274,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 23: w[63] = __byte_perm_S (w[39], w[40], selector); w[62] = __byte_perm_S (w[38], w[39], selector); @@ -5833,7 +8342,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 24: w[63] = __byte_perm_S (w[38], w[39], selector); w[62] = __byte_perm_S (w[37], w[38], selector); @@ -5899,7 +8410,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 25: w[63] = __byte_perm_S (w[37], w[38], selector); w[62] = __byte_perm_S (w[36], w[37], selector); @@ -5965,7 +8478,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 26: w[63] = __byte_perm_S (w[36], w[37], selector); w[62] = __byte_perm_S (w[35], w[36], selector); @@ -6031,7 +8546,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 27: w[63] = __byte_perm_S (w[35], w[36], selector); w[62] = __byte_perm_S (w[34], w[35], selector); @@ -6097,7 +8614,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 28: w[63] = __byte_perm_S (w[34], w[35], selector); w[62] = __byte_perm_S (w[33], w[34], selector); @@ -6163,7 +8682,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 29: w[63] = __byte_perm_S (w[33], w[34], selector); w[62] = __byte_perm_S (w[32], w[33], selector); @@ -6229,7 +8750,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 30: w[63] = __byte_perm_S (w[32], w[33], selector); w[62] = __byte_perm_S (w[31], w[32], selector); @@ -6295,7 +8818,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 31: w[63] = __byte_perm_S (w[31], w[32], selector); w[62] = __byte_perm_S (w[30], w[31], selector); @@ -6361,7 +8886,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 32: w[63] = __byte_perm_S (w[30], w[31], selector); w[62] = __byte_perm_S (w[29], w[30], selector); @@ -6427,7 +8954,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 33: w[63] = __byte_perm_S (w[29], w[30], selector); w[62] = __byte_perm_S (w[28], w[29], selector); @@ -6493,7 +9022,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 34: w[63] = __byte_perm_S (w[28], w[29], selector); w[62] = __byte_perm_S (w[27], w[28], selector); @@ -6559,7 +9090,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 35: w[63] = __byte_perm_S (w[27], w[28], selector); w[62] = __byte_perm_S (w[26], w[27], selector); @@ -6625,7 +9158,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 36: w[63] = __byte_perm_S (w[26], w[27], selector); w[62] = __byte_perm_S (w[25], w[26], selector); @@ -6691,7 +9226,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 37: w[63] = __byte_perm_S (w[25], w[26], selector); w[62] = __byte_perm_S (w[24], w[25], selector); @@ -6757,7 +9294,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 38: w[63] = __byte_perm_S (w[24], w[25], selector); w[62] = __byte_perm_S (w[23], w[24], selector); @@ -6823,7 +9362,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 39: w[63] = __byte_perm_S (w[23], w[24], selector); w[62] = __byte_perm_S (w[22], w[23], selector); @@ -6889,7 +9430,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 40: w[63] = __byte_perm_S (w[22], w[23], selector); w[62] = __byte_perm_S (w[21], w[22], selector); @@ -6955,7 +9498,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 41: w[63] = __byte_perm_S (w[21], w[22], selector); w[62] = __byte_perm_S (w[20], w[21], selector); @@ -7021,7 +9566,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 42: w[63] = __byte_perm_S (w[20], w[21], selector); w[62] = __byte_perm_S (w[19], w[20], selector); @@ -7087,7 +9634,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 43: w[63] = __byte_perm_S (w[19], w[20], selector); w[62] = __byte_perm_S (w[18], w[19], selector); @@ -7153,7 +9702,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 44: w[63] = __byte_perm_S (w[18], w[19], selector); w[62] = __byte_perm_S (w[17], w[18], selector); @@ -7219,7 +9770,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 45: w[63] = __byte_perm_S (w[17], w[18], selector); w[62] = __byte_perm_S (w[16], w[17], selector); @@ -7285,7 +9838,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 46: w[63] = __byte_perm_S (w[16], w[17], selector); w[62] = __byte_perm_S (w[15], w[16], selector); @@ -7351,7 +9906,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 47: w[63] = __byte_perm_S (w[15], w[16], selector); w[62] = __byte_perm_S (w[14], w[15], selector); @@ -7417,7 +9974,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 48: w[63] = __byte_perm_S (w[14], w[15], selector); w[62] = __byte_perm_S (w[13], w[14], selector); @@ -7483,7 +10042,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 49: w[63] = __byte_perm_S (w[13], w[14], selector); w[62] = __byte_perm_S (w[12], w[13], selector); @@ -7549,7 +10110,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 50: w[63] = __byte_perm_S (w[12], w[13], selector); w[62] = __byte_perm_S (w[11], w[12], selector); @@ -7615,7 +10178,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 51: w[63] = __byte_perm_S (w[11], w[12], selector); w[62] = __byte_perm_S (w[10], w[11], selector); @@ -7681,7 +10246,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 52: w[63] = __byte_perm_S (w[10], w[11], selector); w[62] = __byte_perm_S (w[ 9], w[10], selector); @@ -7747,7 +10314,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 53: w[63] = __byte_perm_S (w[ 9], w[10], selector); w[62] = __byte_perm_S (w[ 8], w[ 9], selector); @@ -7813,7 +10382,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 54: w[63] = __byte_perm_S (w[ 8], w[ 9], selector); w[62] = __byte_perm_S (w[ 7], w[ 8], selector); @@ -7879,7 +10450,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 55: w[63] = __byte_perm_S (w[ 7], w[ 8], selector); w[62] = __byte_perm_S (w[ 6], w[ 7], selector); @@ -7945,7 +10518,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 56: w[63] = __byte_perm_S (w[ 6], w[ 7], selector); w[62] = __byte_perm_S (w[ 5], w[ 6], selector); @@ -8011,7 +10586,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 57: w[63] = __byte_perm_S (w[ 5], w[ 6], selector); w[62] = __byte_perm_S (w[ 4], w[ 5], selector); @@ -8077,7 +10654,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 58: w[63] = __byte_perm_S (w[ 4], w[ 5], selector); w[62] = __byte_perm_S (w[ 3], w[ 4], selector); @@ -8143,7 +10722,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 59: w[63] = __byte_perm_S (w[ 3], w[ 4], selector); w[62] = __byte_perm_S (w[ 2], w[ 3], selector); @@ -8209,7 +10790,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 60: w[63] = __byte_perm_S (w[ 2], w[ 3], selector); w[62] = __byte_perm_S (w[ 1], w[ 2], selector); @@ -8275,7 +10858,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 61: w[63] = __byte_perm_S (w[ 1], w[ 2], selector); w[62] = __byte_perm_S (w[ 0], w[ 1], selector); @@ -8341,7 +10926,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 62: w[63] = __byte_perm_S (w[ 0], w[ 1], selector); w[62] = __byte_perm_S ( 0, w[ 0], selector); @@ -8407,7 +10994,9 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; + case 63: w[63] = __byte_perm_S ( 0, w[ 0], selector); w[62] = 0; @@ -8473,6 +11062,7 @@ inline void switch_buffer_by_offset_64x1_le_S (u32 w[64], const u32 offset) w[ 2] = 0; w[ 1] = 0; w[ 0] = 0; + break; } #endif